The present invention relates to a method for fabricating a semiconductor device, and more particularly, to a method for forming a fine pattern in a semiconductor device.
As semiconductor devices become highly integrated, a line width of a pattern needs to be decreased. However, because of resolution limitations of currently developed photo-exposure apparatus, it is difficult to fabricate a semiconductor device with a fine pattern having a line width of under 40 nm.
In order to decrease a line width of a pattern, double exposure and etch technology (DEET), which forms a fine pattern by performing a photolithography process twice, has been suggested. However, DEET causes an overlay problem.
In order to solve the above described limitations, spacer patterning technology (SPT) has been suggested.
FIGS. 1A to 1D are cross-sectional views illustrating a typical method for performing SPT.
In FIG. 1A, a hard mask 11 is formed over a etch target layer 10, and then, a photoresist pattern 12 is formed over the hard mask 11.
Referring to FIG. 1B, a material layer 13 for a spacer is formed over the whole surface of the resultant structure including the photoresist pattern 12.
Referring to FIG. 1C, a spacer 13A is formed on both sidewalls of the photoresist pattern 12 by performing a blanket etch process on the material layer 13.
Referring to FIG. 1D, the photoresist pattern 12 is removed by a photoresist stripping process using O2 plasma.
Referring to FIG. 1E, the hard mask 11 and the etch target layer 10 are etched using the spacer 13A as an etch mask, forming a hard mask pattern 11A and an etch target pattern 10A. A pitch P1 of the etch target pattern 10A can be smaller than the pitch limits of an exposure apparatus.
A thickness of the spacer 13A should be precisely controlled because the spacer 13A is used as an etch mask when etching underlying layers. Therefore, technology capable of precisely controlling a thickness at certain positions of the material layer 13 is required.
To meet the above requirement, it is desirable that the material layer 13 includes a polymer layer which is formed using a method suggested in U.S. Pat. No. 6,916,741 issued to Eric A. Hudson et al., entitled “Method for Plasma Etching Using Periodic Modulation of Gas Chemistry”. In this method, a protective layer forming phase and an etching phase are periodically performed using periodic modulation of a deposition gas chemistry and an etching gas chemistry, so that a polymer layer can be formed to have a target thickness at a target position.
However, according to the above method, a large amount of carbon is included in the polymer layer because the polymer layer is usually formed using CxHy (e.g., C2H6 or CH4) gas or CxHyFz (e.g., CH3F or CH2F2) gas and so on. The polymer layer which includes a large amount of carbon (hereinafter, referred as a carbon-rich polymer layer) and the photoresist pattern 12 have a low etch selectivity to each other, so that the carbon-rich polymer layer is heavily lost while the photoresist pattern 12 is removed. Therefore, it is difficult to use the carbon-rich polymer layer as the etch mask when etching the underlying layers.
FIG. 2 illustrates a degree of loss of a carbon-rich polymer layer in a process of removing a photoresist pattern, that is, FIG. 2(A) illustrates the carbon-rich polymer layer which is formed over the whole surface of the resultant structure including the photoresist pattern; (B) illustrates the carbon-rich polymer layer which remains on both sidewalls of the photoresist pattern after a blanket etch process; and (C) illustrates a resultant structure after removing the photoresist pattern.
As can be seen from FIG. 2(C), a degree of loss of the carbon-rich polymer layer is higher than that of the photoresist pattern while removing the photoresist pattern. Therefore, it is difficult to use the carbon-rich polymer layer as the etch mask when etching the underlying layers.